Exploiting smallest error to calibrate non-linearity in SAR ADCs

This paper presents a statistics-optimised organisation technique to achieve better element matching in Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) in smart sensor systems. We demonstrate the proposed technique ability to achieve a significant improvement of around 23 dB on Spurious Free Dynamic Range (SFDR) of the ADC than the conventional, testing with a capacitor mismatch σu = 0.2% in a 14 bit SAR ADC system. For the static performance, the max root mean square (rms) value of differential nonlinearity (DNL) reduces from 1.63 to 0.20 LSB and the max rms value of integral nonlinearity (INL) reduces from 2.10 to 0.21 LSB. In addition, it is demonstrated that by applying grouping optimisation and strategy optimisation, the performance boosting on SFDR can be effectively achieved. Such great improvement on the resolution of the ADC only requires an off-line pre-processing digital part

Comparator Design in Sensors for Environmental Monitoring

This paper presents circuit design considerations of comparator in analog-to-digital converters (ADC) applied for a portable, low-cost and high performance nano-sensor chip which can be applied to detect the airborne magnetite pollution nano particulate matter (PM) for environmental monitoring. High-resolution ADC plays a vital important role in high perfor-mance nano-sensor, while high-resolution comparator is a key component in ADC. In this work, some important design issues related to comparators in analog-to-digital converters (ADCs) are discussed, simulation results show that the resolution of the comparator proposed can achieve 5µV , and it is appropriate for high-resolution application

High-Resolution ADCs Design in Image Sensors

This paper presents design considerations for high-resolution and high-linearity ADCs for biomedical imaging ap-plications. The work discusses how to improve dynamic spec-ifications such as Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) in ultra-low power and high-resolution analog-to-digital converters (ADCs) including successive approximation register (SAR) for biomedical imaging application. The results show that with broad range of mismatch error, the SFDR is enhanced by about 10 dB with the proposed performance enhancement technique, which makes it suitable for high resolution image sensors sensing systems

A Improved EPC Class 1 Gen 2 Protocol with FCFS Feature in the Mobile RFID Systems

In all anti-collision protocols of RFID standards, EPCGlobal Class 1 Generation 2 (C1G2) protocol has been most widely used in RFID systems since it is simply, efficient and safety. Similar to most existing anti-collision protocols, The C1G2 protocol initially aims at tag identification of static scenarios, where all tags keep still during the tag identification process. However, in many real scenarios, tags generally move along a fixed path in the reader coverage area, which implies that tags stay the coverage area only for a limited time (sojourn time). The scenarios are usually called mobile RFID systems. Because the multiple tag identification based on a shared wireless channel is random, tags entering the reader coverage area earlier may be identified later (random later identification phenomenon). The phenomenon and the limited sojourn time may let some tags lost. In this paper, we propose an improved C1G2 protocol with first come first served feature in mobile RFID systems. The protocol can overcome the RLI phenomenon effectively and retains good initial qualities of C1G2 protocol by modifying it slightly. Simulation results show that the proposed protocol can significantly reduce the numbers of lost tags in mobile RFID systems. The idea of the paper is beneficial for redesigning other existing tag anti-collision protocols so as to make these protocols adapt to mobile RFID systems

High Linearity SAR ADC for Smart Sensor Applications

This paper presents capacitive array optimization technique to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart sensor application. Monte Carlo simulation results show that capacitive array optimization technique proposed can make the SFDR, SNDR and (Signal-to-Noise Ratio) SNR more concentrated, which means the differences between maximum value and minimum value of SFDR, SNDR and SNR are much smaller than the conventional calibration techniques, more stable performance enhancement can be achieved, and the averaged SFDR is improved from 72.9 dB to 91.1 dB by using the capacitive array optimization method, 18.2 dB improvement of SFDR is obtained with only little expense of digital logic circuits, which makes it good choice for high resolution and high linearity smart sensing systems

Modelling of three-axis Hall effect sensors based on integrated magnetic concentrator

In this paper, we develop computational model to analyze the magnetic concentrating effect of integrated magnetic concentrator (IMC) on surrounding external magnetic field. We present an IMC-based three-axis Hall sensor model that enables to measure both inclination angles and absolute strength of a random external magnetic field. An IMC changes surrounding parallel magnetic components into perpendicular components, and therefore allows the horizontal Hall plates to measure both the strength and inclination angles of parallel external magnetic fields. We develop a finite element method (FEM) based model in COMSOL Multiphysics for the three-axis Hall sensor. Key factors influencing IMC’s magnetic concentrating effect, including material property and sensor structure, are investigated and discussed using the developed model. Comparing to traditional IMC-based three-axis angular sensors, a reference permanent magnet is no longer needed in the sensor. A measurement accuracy of 0.8 and 1.2 degrees are achieved respectively for the angles of α and θ of external magnetic field

High-precision adaptive slope compensation circuit for DC-DC converter in wearable devices

This paper presents a high precision adaptive slope compensation circuit for for DC-DC converter in wearable devices. Compared with the traditional adaptive slope compensation circuit, the comparator is used to sample the output voltage and input voltage, which greatly improves the accuracy.In this paper, the circuit is designed in UMC 0.18-μm CMOS Technology and verified by Virtuoso Spectre Circuit Simulator. The simulation results show that the accuracy of the adaptive slope compensation circuit in this paper can reach more than 96%

Teaching embedded systems for energy harvesting applications: a comparison of teaching methods adopted in UESTC and KTH

Further to China’s plan that was introduced in 2017 for attracting more students into engineering, many Chinese universities have started to explore new teaching methods that can be adopted into their programs. This shift was geared towards developing student-centred teaching materials rather than traditional teacher centred instruction. In this manuscript, we compare two different methods of instruction for a course on energy harvesting using embedded systems. We describe the learning materials and showcase the impact that project-based learning has had on a cohort of Chinese students that were enrolled in a joint master’s program between the University of Electronic Science and Technology of China (UESTC) and the Royal Institute of Technology (KTH). KTH has made remarkable progress in the teaching of embedded systems technology for energy harvesting applications, with great emphasis on active as well as collaborative learning. We demonstrate two examples of projects that Chinese students have completed in KTH and present evaluative data regarding their experiences. Our results show that KTH’s approach in teaching this module has had a positive impact on student learning, with an average of 80% of students think that teaching in KTH is conducive to students’ independent exploration

A 4-channel 12-bit high-voltage radiation-hardened digital-to-analog converter for low orbit satellite applications

This paper presents a circuit design and an implementation of a four-channel 12-bit digital-to-analog converter (DAC) with high-voltage operation and radiation-tolerant attribute using a specific CSMC H8312 0.5-μm Bi-CMOS technology to achieve the functionality across a wide-temperature range from -55 °C to 125 °C. In this paper, an R-2R resistor network is adopted in the DAC to provide necessary resistors matching which improves the DAC precision and linearity with both the global common centroid and local common centroid layout. Therefore, no additional, complicated digital calibration or laser-trimming are needed in this design. The experimental and measurement results show that the maximum frequency of the single-chip four-channel 12-bit R-2R ladder high-voltage radiation-tolerant DAC is 100 kHz, and the designed DAC achieves the maximum value of differential non-linearity of 0.18 LSB, and the maximum value of integral non-linearity of -0.53 LSB at 125 °C, which is close to the optimal DAC performance. The performance of the proposed DAC keeps constant over the whole temperature range from -55 °C to 125 °C. Furthermore, an enhanced radiation-hardened design has been demonstrated by utilizing a radiation chamber experimental setup. The fabricated radiation-tolerant DAC chipset occupies a die area of 7 mm x 7 mm in total including pads (core active area of 4 mm x 5 mm excluding pads) and consumes less than 525 mW, output voltage ranges from -10 to +10 V

Reform and Practice of Analog Circuits

In the new century, education has become the focus of the reform. At present, cross, penetration and integration between basic courses are the key to improve the quality of teaching and the overall quality of students. University of Electronic Science and Technology of China (UESTC) combines "circuit analysi" and "fundamentals of analog circuits" as one course "electronic circuit", the curriculum reform follows the principles of strengthening the foundation, updating the structure, penetrating the interdisciplinary and simplifying the courses. This paper discusses the principles and ideas of reforms related to the "electronic circuit": the results show that the teaching can broaden the knowledge and vision of students, as a result, the students can better adapt to the requirements of learning and challenge of the new era